Conventionally, in a multiprocessor system having multiple processors, a method of reducing power consumption by executing programs using the lowest possible frequency and source voltage (dynamic voltage and frequency scaling (DVFS)) is employed. For example, according to one method, at least the frequency of the processors or the source voltage is controlled within a range of satisfying performance constraints of programs executed by the processors (for example, refer to Japanese Laid-Open Patent Publication No. 2008-287592).
Nonetheless, with conventional DVFS, when the frequency and the source voltage of the processors are changed, power consumption during the period elapsing until suspension of the data processing by the processing unit or suspension of the bus is not considered. Therefore, a problem arises in that irrespective of switching to low frequency or low source voltage by DVFS, after adding the power consumed during the period until the data processing or the bus is suspended, the power consumption after the switch may be greater than before the switch.